tag:blogger.com,1999:blog-4274794615816690062.post2877765901022085896..comments2023-08-26T03:48:35.236+03:00Comments on risc-a-day: FPGA JTAG DebugPicMasterhttp://www.blogger.com/profile/13300377990065511523noreply@blogger.comBlogger7125tag:blogger.com,1999:blog-4274794615816690062.post-92228326538354583292022-04-22T13:22:48.549+03:002022-04-22T13:22:48.549+03:00Really wonderful article, it was exceptionally hel...Really wonderful article, it was exceptionally helpful! I simply began in this and I'm becoming more acquainted with it better! Cheers, keep doing awesome! It's wonderful article.<br /><a href="https://myspace.com/tobarokalli126035/post/activity_profile_96364703_f055e5f3a10a450da81483d736a7a71d/comments" rel="nofollow">JTAG</a><br />Tobarok Allihttps://www.blogger.com/profile/16403007052763162443noreply@blogger.comtag:blogger.com,1999:blog-4274794615816690062.post-47914440862326019472017-10-01T04:39:27.316+03:002017-10-01T04:39:27.316+03:00Hi Sak. Spartan-3 is indeed a cool FPGA, even if l...Hi Sak. Spartan-3 is indeed a cool FPGA, even if little vintage nowadays :). Regarding your issue with the OpenOCD SVF configuration issue - please double-check that your StartupClk is set properly (UserClk, Cclk or JtagClk), as it may cause your device to configure OK but to not start (just waiting for non-existing clock due to misconfiguration in the bitstream). Regards.PicMasterhttps://www.blogger.com/profile/13300377990065511523noreply@blogger.comtag:blogger.com,1999:blog-4274794615816690062.post-77664675932372362462017-09-17T21:18:15.378+03:002017-09-17T21:18:15.378+03:00Hi there.
Just wanted to report success, by parti...Hi there.<br /><br />Just wanted to report success, by partially following your path.<br /><br />Openocd running on RPi3, using the sysfsgpio driver and the jtag protocol, connected on a Xilinx spartan 3 starter board (legacy item these days), reports the correct chips, thanks to your info.<br /><br />Unfortunately, the path ISE->Impact->SVF->openocd svf player, fails to configure the FPGA, despite<br />the device entering and exiting programing mode, and openocd reporting success.<br /><br />Thanks for sharing.<br /><br />SakAnonymoushttps://www.blogger.com/profile/01364054606853210072noreply@blogger.comtag:blogger.com,1999:blog-4274794615816690062.post-90280619410132210782017-06-14T22:05:32.749+03:002017-06-14T22:05:32.749+03:00Hi Joe. Just use your favorite text editor, and co...Hi Joe. Just use your favorite text editor, and copy/paste the text of my spartan3e.cfg as published above, and that's it. Regards.PicMasterhttps://www.blogger.com/profile/13300377990065511523noreply@blogger.comtag:blogger.com,1999:blog-4274794615816690062.post-30151441470264200482017-06-14T16:26:38.804+03:002017-06-14T16:26:38.804+03:00Dear PicMaster,
I know it has been a while since ...Dear PicMaster,<br /><br />I know it has been a while since you posted this. But how did you create the spartan3e.cfg file or where did you find it?<br /><br />Thank you, this is great stuff.<br />JoeAnonymousnoreply@blogger.comtag:blogger.com,1999:blog-4274794615816690062.post-87844733356941598812013-09-07T04:04:09.865+03:002013-09-07T04:04:09.865+03:00Hi Luis,
If you look at OpenOCD's doc, it say...Hi Luis,<br /><br />If you look at OpenOCD's doc, it says that it's generally impossible to find out all relevant information for the scan chain just, so autoprobe is mostly as a helper tool than a complete solution. Please check this blog entry and see if some of these OpenOCD configurations will work for you (manually describe the JTAG TAPs and their IR lengths to make sure they work).<br /><br />Regards.PicMasterhttps://www.blogger.com/profile/13300377990065511523noreply@blogger.comtag:blogger.com,1999:blog-4274794615816690062.post-47203467564116655122013-09-06T19:52:37.775+03:002013-09-06T19:52:37.775+03:00Hi,
I am working with the s3board[0] (by digilent ...Hi,<br />I am working with the s3board[0] (by digilent inc) and I<br />using openocd with the OOCDlink-s[1] interface. The s3board has a<br />FPGA(xc3s200) and PROM(xcf02s) that they are in jtag chain (JTAG[TDI] --><br />FPGA --> PROM --> JTAG[TDO]).I have a problem with autoprobing mode. The<br />openocd found a one device (PROM), it not found the FPGA[2].<br /><br />Can you give me any information about it? Thanks very much in advance.<br /><br />Regards,<br /><br />Luis<br /><br />[0] http://www.digilentinc.com/Products/Detail.cfm?Prod=S3BOARD<br />[1] http://www.xo2link.de/wp/?page_id=15<br />[2] http://pastebin.com/HFrqQvLNLuis A. Guanucohttps://www.blogger.com/profile/12126649000996864687noreply@blogger.com